Methods of parallel vertical data processing in neural networks

Abstract

An operational basis of neural networks has been identified. The feasibility of development of parallel-vertical hardware neural networks has been substantiated. A parallel-vertical data processing method in neural elements (neural networks) that is oriented to the VLSI implementation and provides a reduction of the number of interface's pins, the bitness of interneuron connection, and equipment costs has been developed. The principles of the VLSI implementation of neural networks have been proposed.