1.
Barkalov O, Titarenko L, Golovin O, Matviienko O, Saburova S. Optimization of the Two-Level Mealy Machine Circuit in the FPGA Basis. Inf.Tech.&Syst. [Internet]. 2025 Jun. 30 [cited 2026 May 21];1(1):24-38. Available from: https://nasu-periodicals.org.ua/index.php/its/article/view/17926