BARKALOV, O.; TITARENKO, L.; GOLOVIN, O.; MATVIIENKO, O.; SABUROVA, S. Optimization of the Two-Level Mealy Machine Circuit in the FPGA Basis. Information Technologies and Systems, [S. l.], v. 1, n. 1, p. 24–38, 2025. DOI: 10.15407/intechsys.2025.01.024. Disponível em: https://nasu-periodicals.org.ua/index.php/its/article/view/17926. Acesso em: 21 may. 2026.